1. Field of the Invention
The present invention relates to an apparatus and method for providing heat sinks or heat spreaders for stacked semiconductor devices.
2. State of the Art
Semiconductor device packages or integrated circuit packages typically contain small integrated circuits on a silicon substrate, or the like, typically referred to as IC chips or die or dice. Such IC dice come in an infinite variety of forms, including, for example, Static Random Access Memory (SRAM) dice, Synchronous DRAM (SDRAM) dice, Static Random Access Memory (SRAM) dice, Sequential Graphics Random Access Memory (SGRAM) dice, flash Electrically Erasable Programmable Read-only Memory (EEPROM) dice, and processor dice.
Packaged IC dice communicate with circuitry external to their packages through lead frames embedded in the packages. These lead frames generally include an assembly of leads that extend into the packages to connect to bond pads on the IC dice through thin wire bonds or other connecting means and extend from the packages to terminate in pins or other terminals that connect to the external circuitry. Exemplary conventional lead frames include paddle-type wore-bond lead frames, which include a central die support and leads which extend to the perimeter of IC dice and connect to the dice through thin wire bonds, Leads-Over-Chip (LOC) lead frames, having leads which extend over an IC die to attach to and support the die while being electrically connected to the die through wire bonds or other connecting means, and Leads-Under-Chip (LUC) lead frames, having leads which extend under an IC die to attach to and support the die from below while being connected to the die typically through wire bonds.
As with all conductors, the leads in lead frames have an inductance associated with them that increases as the frequency of signals passing through the leads increases. This lead inductance is the result of two interactions: the interaction among magnetic fields created by signal currents flowing to and from an IC die through the leads and magnetic fields created by oppositely directed currents flowing to and from ground (known as "self" inductance).
While lead inductance in IC packages has not traditionally been troublesome because traditionally slow signal frequencies have made the inductance relatively insignificant, the ever-increasing signal frequencies of state of the art electronic systems have made lead inductance in IC packages significant.
In an attempt to eliminate such problems, IC die are being mounted on substrates, such as printed circuit boards, using flip-chip type mounting arrangements. This allows for a high density of mounting arrangements for the IC die in a small area and solder balls or conductive epoxy to be used for the connections between the IC die and the substrate. However, the high density of the IC die on the substrate with increased operating speeds for the IC die cause a great amount of heat to be generated in a small confined area which can be detrimental to the operation of the IC die and substrate as well as surrounding components. Such heat must be dissipated as effectively as possible to prevent damage to the IC die.
Various arrangements have been suggested for use in dissipating heat from IC die on substrates.
U.S. Pat. No. 5,239,200 illustrates an apparatus for cooling an array of integrated circuit chips mounted on a substrate comprising a thermally conductive cooling plate which has a plurality of integral, substantially parallel, closed-end channels for the circulation of a cooling medium therethrough.
U.S. Pat. No. 5,379,191 is directed to an adapter for an integrated circuit chip which may be used in a package arrangement for the chip. The package may include a heat sink or heat spreader on the top of the chip.
U.S. Pat. No. 5,396,403 is directed to a heat sink assembly for a multi-chip module. A thermally conductive plate is bonded to integrated circuit chips on a multi-chip module by indium solder. The plate, in turn, is thermally coupled to a heat sink, such as a finned aluminum member by thermal paste.
U.S. Pat. No. 5,291,064 is directed to a packaged semiconductor device having a wired substrate. A plurality of semiconductor device chips are connected to the wiring substrate by the use of bumps. A heat sink is bonded through a high heat conductive bonding layer to a surface of each of the semiconductor device chips.
However, in each instance of the prior art discussed above, the IC die or semiconductor devices are installed on the substrate in a single layer for the cooling thereof.
A need exists for the cooling of semiconductor devices on a substrate where the substrates and devices are vertically stacked. In such an arrangement the dissipation of the heat from the semiconductor devices is of concern.